It has been a week since the AMD Fusion developer forum and I have been reading about what was said and told by AMD, ARM, and Microsoft speakers. While there were a lot of talks, the one that jumps out at me most is from AMD Fellow Phil Rogers. The following is my top three inferences from this talk.

1. Accelerators are taking over the world. The word GPU, APU, and video were mentioned twice as many times as ‘CPU’ (yes, I tallied). To see what I mean, look at this slide of an AMD chip. Can you even spot the CPUs? My rough measurements say that CPUs constitute less than 15% of this chip.

Screen shot 2011-06-21 at 10.56.13 PM

2. According to AMD, we are past the multi-core era and entering the era of heterogeneous cores. Really? Isn’t it true that penetration of parallel programming is still low and we are having so much trouble keeping multi-cores busy? If heterogeneous is the next step then I am afraid we are getting ahead of ourselves here. I would go back and say that we are designing the wrong chips. We need to first design multi-cores in a way that they become programmable. Shifting it to programmers is not getting it done.

Screen shot 2011-06-22 at 1.16.48 AM

3. The gap between CPU and GPU is closing. GPUs are expected to have virtual memory, exception handling, recursion, context-switches, pre-emption, etc. As GPUs inherit more and more CPU features, who needs CPUs? It is noteworthy that a GPU with all of the above features can indeed operate as a CPU. When running single-threaded code, the chip can clock-gate N-1 vector lanes and keep just a single lane on. I guess we will  still need aggressive cores to tackle Amdahl’s law but their need is diminishing.

Screen shot 2011-06-22 at 1.34.05 AM

In the future …

Phil’s talk is indeed very intriguing. The lesson I learned is that heterogeneous cores will be upon developers whether they like it or not. I do think these architectural advancements (or cop outs) must be accompanied with advancements in compiler technology to find parallelism. Remember, newer frameworks only solve a part of the problem. We will need more help from the compiler and run-time system in solving the biggest challenge of functional asymmetry: choosing the best core for each type of code. I suggest better profile-based compilation technique that can suggest to the programmer which core can run this code best.

11 Responses to “Inferences from AMD Fusion Developer Forum”

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  10. Aater Suleman: “The gap between CPU and GPU is closing. GPUs are expected to have virtual memory, exception handling, recursion, context-switches, pre-emption, etc. As GPUs inherit more and more CPU features, who needs CPUs?”

    The convergence is happening on both ends. The AVX2 instruction set adds gather and fused multiply-add instructions to the CPU. The next step consists of executing 1024-bit instructions on 256-bit units in four cycles. This allows hiding memory latencies, in the same way GPUs operate.

    What’s more, it wouldn’t compromise performance for legacy sequential workloads! Also note that AVX-1024 would create opportunities for clock gating the CPU’s front-end, thus lowering power consumption. Last but not least, it would be an x86 architecture, which still dominates the market. Don’t underestimate the effect of software backward compatibility.

    So the question you should really be asking, is who needs GPUs? They are still a long way off from adequately running a full-blown OS and legacy applications. And every feature they add lowers computing density and increases power consumption, toward the same levels that a CPU with AVX-1024 would achieve.

    So it’s no wonder that Intel’s strategy is the opposite of AMD’s. Instead of fairly large GPU cores and crippled CPU cores, Haswel will feature powerful CPU cores with AVX2, and a mediocre GPU. Developers of high throughput applications are far more likely to invest their time into simply recompiling for AVX, then to write complex new code for multiple, changing heterogeneous architectures…

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